1. Field of the Invention
The present invention relates to data driven type information processors.
2. Description of the Background Art
In a conventional von Neuman computer, various instructions are stored in advance in a program memory as a program, and addresses in the program memory are sequentially addressed by a program counter so that the instructions are sequentially read out, whereafter the instructions are executed.
Meanwhile, a data driven type information processor is one type of non-von Neuman computers which does not have a concept of such execution of sequential instructions by a program counter. Such a data driven type information processor employs architecture based on parallel processing of instructions. In the data driven type information processor, a collection of data to be operated permits execution of an instruction, and a plurality of instructions are driven by the data at one time. Thus, the program is executed in a parallel manner in accordance with the natural flow of the data. As a result, it is considered that time required for such operation is greatly reduced.
FIG. 26 is a block diagram showing one example of a conventional data driven type information processor.
FIGS. 27A and 27B are representations, each showing the field structure of a data packet in the data driven type information processor shown in FIG. 26.
FIG. 28 is a representation schematically showing tools to aid a user in developing a data flow program and a developing procedure.
A data packet PA in FIG. 27A includes a generation field F1, a destination field F2, an instruction field F3, and a data field F4. A data packet Pa in FIG. 27B includes, in addition to fields F1 to F4, a data field F5. A generation number is stored in generation field F1, destination information is stored in destination field F2, instruction information is stored in instruction field F3, and operand data (including constant data) is stored in data field F4 or F5.
A data driven type information processor in FIG. 26 includes an input/output control unit QJB, a program storage unit PS, a firing control unit FC including a queuing memory, and an operation unit FP. Input/output control unit QJB includes a branching/allocating function of dividing the destination of the data packet for output. Program storage unit PS includes a memory capable of storing a data flow program formed of the plurality of destination information and instruction information, and of high speed accessing. Firing control unit FC includes a queuing memory to keep one data packet waiting according to a priority order based on generation numbers until two different data packets PA to be operated in response to a binomial operation instruction are collected. Firing control unit FC has a function of forming the two data packets into one data packet Pa and sending the same to operation unit FP as soon as these two data packets are collected (hereinafter referred to as firing). Operation unit FP has arithmetic operation and logic operation functions.
Now, an operation when a data flow program is executed will be described. It is assumed that various data necessary for executing a data flow program and a program to be executed are stored in advance in memories or registers (not shown) in program storage unit PS and input/output control unit QJB.
The data packet PA is input to input/output control unit QJB through a terminal IN in FIG. 26, and control unit QJB selectively transmits the input packet PA to one of program storage unit PS and a terminal OUT based on the destination information of the input packet PA. Program storage unit PS reads next order destination information, next order instruction information and the like from the data flow program by addressing based on the destination information of the input data packet PA. The read out next order destination information and next order instruction information are stored in the destination field F2 and instruction field F3, respectively of the input data packet PA, and the input data packet is provided to firing control unit FC. Firing control unit FC accesses the queuing memory by addressing based on the destination information and generation number of the input data packet and detects a firing. More specifically, if queuing data is stored in the addressing region of the queuing memory, a firing takes place according to a priority order based on a comparison result between a queuing generation number stored in the addressing region and the generation number of the input data packet PA. Conversely, if queuing data is not stored in the addressing region, the operand data and the non-offset field of the generation number of the input data packet PA are written in the addressing region, thus queuing for a data packet PA. The non-offset field of a generation number indicates the portion of data representing the generation number which is not used for addressing a queuing memory. When firing control unit FC detects two different data packets PA whose designation information and generation number match one another, the operand data of one data packet, the content of data field F4 in FIG. 27A, for example, is stored in data field F5 in FIG. 27B, and the data packet Pa is provided to operation unit FP.
Operation unit FP operates destination information based on the instruction information of the data packet Pa output from firing control unit FC or operates the operand data, stores the operation result in the data field F4 of the data packet PA and sends out the packet. The data packet PA sent from operation unit FP is provided to input/output control unit QJB, and is selectively sent to one of program storage unit PS and terminal OUT based on its destination information. When the data packet PA is sent out to program storage unit PS, the next instruction is read similarly to the above-described manner.
As stated above, as the data packet PA circulates in the order of program unit PS.fwdarw.firing control unit FC.fwdarw.operation unit FP.fwdarw.program storage unit PS, a processing based on a data flow program stored in the data driven type information processor proceeds.
The above-described data flow program is developed via a procedure including a text editor, a compiler or an assembler, a linker and a mapper prepared in software in FIG. 28. The text editor is an editor for producing a data flow program according to C language. An edited data flow program is stored in a source file so that it can be processed by the compiler or the assembler. The compiler reads the source file, analyzes and develops the data flow in a flow graph (intermediate type file). Meanwhile, the assembler can describe in a manner closer to the flow graph and develops the data flow in a flow graph (intermediate type file) as is the case with the compiler. The linker combines these flow graphs. The combined flow graph is developed in an executable form (object module) through the mapper. The object module is down-loaded to a target system such as the data driven type information processor shown in FIG. 26 or a software simulator in a data packet PA, stored in program storage unit PS or firing control unit FC, and then executed as a program.
FIG. 29 illustrates one example of a calculation program.
FIG. 30 shows a data flow graph obtained from the program in FIG. 29.
FIGS. 31A and 31B each show a storage content when an object module obtained from the data flow graph in FIG. 30 is stored in the program storage unit PS or the queuing memory of firing control unit FC. In FIGS. 31A and 32A, a slanted line means "not used", a ".Yen." means queuing operand data value; "$" means valid operation or destination data value; and "VDL" means firing control flag.
The program shown in FIG. 29 can be described in about the same manner as C language from a grammatical point of view. When this is subjected to a data flow analysis according to the procedure shown in FIG. 28, the data flow graph shown in FIG. 30 is obtained. When this is loaded to a target system as an object module, program data as shown in FIG. 31A is stored in the program memory of program storage unit PS, and constant data necessary for program execution processing is stored as well. The queuing memory of firing control unit FC has a physical address space corresponding to the program memory.
Pentagon and ellipse symbols in the data flow graph in FIG. 30 are called nodes, and input data and operation instructions are allocated thereto. A line connecting a node is called an arc. When the program in FIG. 29 is flow-analyzed, the nodes are provided with node numbers #0-#20 as shown in FIG. 30. A node number represents destination information, while an operation instruction represents instruction information. Of operation instructions, NOP indicates a no operation preserving an input for output without doing anything, * indicates multiplication, + indicates addition, INC indicates incrementing the value of input data by 1, DC indicates decrementing the value of input data by 1, - indicates subtraction, and ABS indicates an operation processing to produce an absolute value.
The program memory Of program storage unit PS in FIG. 31A has a space corresponding to an address pointed (addressed) by the destination information of an input data packet PA (hereinafter referred to as pointer address), and stores an instruction, a destination, a left/right flag, a copy flag or a constant flag for each pointer address. The instruction represents instruction information (operation instruction), the destination represents next order destination information (next order node number), the left/right flag represents either left input or right input corresponding destination information, in other words the instruction of the next order node number. At the time of reading from program storage unit PS, the left/right flag is stored in destination field F2.
In a data flow program, a copy of data is sometimes necessary as illustrated in FIG. 30. If, for example, the output of node number #0 or node number #2 is operand data of two or more operation instructions, e.g. operand data of multiplication and addition instructions of node number #4 and #6, a copying processing will be necessary. The copying processing is performed in program storage unit PS. When the instruction of a node number which requires a copying processing is executed in FIG. 30, the copy flag is set to "1" so that the next address is designated following a corresponding pointer address in FIG. 31A and data is sequentially read out. Accordingly, the copy flag is set (="1") in the pointer address #0 in FIG. 31A, and when the pointer address #0 is designated, information stored in the address #0 is read out followed by reading of information stored in the next address #0. By this copying processing, for the two nodes of node numbers #4 and #6 linked in parallel to the node of node number #0, its left input data is obtained at the same time.
In a data flow program, when constant data is described as illustrated in FIG. 30, in other words when the operand data of nodes of node numbers #15, #16, and #17 are constants K1, K2, and K3, respectively, as shown in FIG. 31A constant flags are set in response to corresponding pointer addresses.
The queuing memory of firing control unit FC in FIG. 31B stores a queuing operand and a firing control flag VLD corresponding to each pointer address. The firing control flag VLD is set to "1" when a corresponding queuing operand is stored in a queuing state (non-firing), and otherwise to "0".
Now, an operation of executing the program shown in FIG. 29 in the data driven type information processor shown in FIG. 26 will be described in conjunction with FIGS. 26 to 31. It is noted that description will not be provided on priority order determination for firing in firing control unit FC according to generation numbers for ease of description.
Data packets a1 and b1 in FIG. 30 are provided to the data driven type information processor. The data packet al stores NOP for instruction information, node number #0 for destination information, "g" for generation number, and "a" for operand data. The data packet b1 stores NOP for instruction information, node number #2 for destination information, "g" for generation number, and "b" for operand data.
The data packets a1 and b1 are provided to program storage unit PS via the input/output control unit QJB of the data driven type information processor shown in FIG. 26. Program storage unit PS reads the instruction *, the destination #4, and the left flag stored in the pointer address #0 in FIG. 31A by addressing based on the destination information #0 in the input data packet, and stores them in the instruction field F3 and destination field F2 of the input data packet a1, respectively and outputs the data packet al to firing control unit FC. At that time, since a corresponding copying flag is set in the pointer address, the instruction +, the destination #6, and the left flag stored sequentially in the pointer address #1 are read out to be stored in prescribed fields of a data packet PA which stores "a" for operand data, and the packet PA is output to firing control unit FC.
Similarly, program storage unit PS reads out instruction *, destination #4, and right flag stored in the pointer address #2 in FIG. 31A by addressing based on the destination information #2 of the input data packet b1 and stores them in the instruction field F3 and destination field F2 of the input data packet b1, and the packet b1 is output to firing control unit FC. At that time, since a corresponding copying flag is set in the pointer address, instruction +, destination #6 and right flag stored in the next pointer address #3 are sequentially read out, each stored in a prescribed field of a data packet PA storing "b" for operand data, and the packet PA is output to firing control unit FC.
Firing control unit FC sequentially inputs a data packet provided from program storage unit PS, addresses a queuing memory in FIG. 31B based on its destination information (node number) and generation number, in response to instruction information of the input data packet being a binominal operation instruction, writes the operand data of the input data packet in a region corresponding to a corresponding pointer address, and sets a corresponding firing control flag VLD, and the written data queues until a data packet storing operand data to be paired therewith is input. When a data packet storing operand data to be paired with the input data packet is input, a firing in each of the nodes of node numbers #4 and #6 in FIG. 30 is detected in the pointer addresses #4 and #6 in FIG. 31B, and a data packet Pa storing the operand data pair is sequentially sent to the next operation unit FP. After the firing detection, the firing control flag VLD corresponding to the pointer address is reset. In operation unit FP, the operand data pair is subjected to an operation according to instruction information stored in the input data packet Pa, and the result of the operation is stored in the field F4 of a data packet PA and the packet PA is output. Thus, the operation instructions of node numbers #4 and #6 in FIG. 30 are executed, and a data packet storing an operation result x in its field F4 and a data packet storing an operation result y in its field F4, respectively are sequentially provided to program storage unit PS.
Program storage unit PS accesses the program memory shown in FIG. 31A and reads the next instruction in the same manner as described above by addressing based on the destination information of the data packets storing the operation result. More specifically, in response to input of the data packet storing the operation result x, an instruction INC and a destination #8 stored in the pointer address #4 in FIG. 31A are read out, while in response to a corresponding copying flag being set, an instruction DEC and a destination #10 stored in the pointer address #5 are sequentially read out. The read out information are each stored in the data packets storing operand data "x", and the data packets are sequentially sent out to firing control unit FC. In response to input of the data packet storing the operation result "y", an instruction DEC and a destination #12 stored in the pointer address #6 are read out, while in response to a corresponding copying flag being set, an instruction INC and a destination #13 stored in the pointer address #7 are read out. The read out information are each stored in the data packets storing operand data "y" as in the case of the previous example, and the data packets are sent to firing control unit FC. Firing control unit FC responds to the instruction information DEC or INC Of the data packet provided from program storage unit PS being a monominal operation instruction and provides the input data packet to operation unit FP without performing any processing. Operation unit FP performs an operation to the operand data stored therein according to the instruction information of the data packet provided from firing control unit FC, and sends out the data packet storing the operation result to program storage unit PS. At that time, operations corresponding to nodes numbers #8, #10, #12 and #13 in FIG. 30 are performed. Accordingly, four data packets storing x+1, x-1, y-1, and y+1 in their data fields F4, respectively are sequentially sent out to program storage unit PS.
Program storage unit PS sequentially accesses the pointer addresses #8, #10, #12, and #13 in FIG. 31A by addressing based on the destination information (node numbers) of the data packets storing the results of operations, reads information stored therein, and data packets storing the read out information are output to control unit FC. At that time, in response to a corresponding constant flag being set, another set of the read out information described above is produced. Further, constant data stored in the next pointer addresses #9, #11, and #14 is sequentially read out, and data packets storing the read out information are sent out to firing control unit FC. In firing control unit FC, queuing for data is not performed, since it is a constant operation, an operand data pair is produced from the sequentially input data packets and sent to operation unit FP. Thus, in operation unit FP, operation instructions with constants in node numbers #15, #16 and #17 in FIG. 30 are sequentially executed.
Similarly, thereafter, packets circulate program storage unit PS, firing control unit FC and operation unit FP, operations in node numbers #18, #19, and #20 in FIG. 30 are executed, and the operation results v, t, and s are obtained.
As described above, the circulation of data from program storage unit PS.fwdarw.firing control unit FC.fwdarw.operation unit FP.fwdarw.program storage unit PS.fwdarw. . . . permits the program shown in FIG. 29 stored in program storage unit PS to be executed.
In order to process data of a packet type, the above-described data driven type information processor requires as program data, in addition to "instruction" data in a conventional von Neuman processor, "destination" data, "generation number" data, and "operand (including constants) data". Therefore, in the data driven type information processor, redundant object data as compared to a von Neuman information processor will be produced. Due to miniaturization technology limitations in the manufacture of ICs (Integrated Circuits), however, a one-chip IC memory having the functions and capacities of the program memory of the program storage unit and the queuing memory of the firing control unit cannot be obtained. Therefore, the program storage function of storing object data and the queuing memory function for queuing data to be paired with are implemented by separate IC memories.
As described above, separate memories are necessary for the program storage unit and the firing control unit and an address/decoder, a reading circuit, a writing circuit and the like should be provided for each memory, which means that necessary memory peripheral circuitry must be doubled. This makes it difficult to reduce the size of the data driven type information processor. Furthermore, the doubled memory peripheral circuitry excessively increases the number of! processing stages excessively which gives rise to the increase of program execution time.
In the above-described conventional method of controlling data flow program execution, the identification number of an execution instruction is allocated separately to each instruction node on a data flow graph by the compiler. Therefore, different destination node numbers must be allocated to two operand data per one binominal operation, and the size of the object module becomes redundant, which further increases program execution time.
FIG. 32 is a block diagram showing another example of a conventional data driven type information processor.
FIG. 33 is a representation showing the field structure of a data packet circulating through the data driven type information processor shown in FIG. 32.
In FIG. 33, a data packet P is formed of a first word and a second word. The first word includes a flag field f1, an instruction field f2, a generation number field f3, a node number field f4, and an identification code field f5. The second word includes a left data field f6, and a right data field f7. A through flag SF which will be described later is stored in field f1, an instruction code in field f2, a generation number of an address portion and a non-address portion in field f3, and a node number in field f4. A left/right identification code L/R is stored in field f5. Left operand data is stored in field f6, and right operand data is stored in field f7. Data related to the instruction code stored in the field f2 of the packet P is stored in fields f6 and f7. If the instruction code is a binominal operation instruction requiring the right and left operand data, the left operand data and right operand data related to the instruction code are stored in fields f6 and f7, respectively. Meanwhile, if the instruction code in field f2 is a monominal operation instruction utilizing one operand data, that one operand data related to the instruction code is stored only in field f6. The address portion and non-address portion of the generation number, and the left/right identification code L/R will be later described more in detail.
Data driven type information processor 30 in FIG. 32 includes an operation portion 2, a branch portion 3, a junction portion 4, a program storage unit 5 and a firing control unit 6.
FIG. 34 is a representation showing part of the storage content of program storage unit 5 in FIG. 32.
FIG. 35 is a representation showing part of the storage content of the queuing memory of firing control unit 6 shown in FIG. 32.
FIG. 36 is a block diagram showing a program reading mechanism in the program storage unit shown in FIG. 32.
A data flow program as shown in FIG. 34 is stored in advance in program storage unit 5 shown in FIG. 32. Referring to FIG. 34, the data flow program includes a plurality of stored sets of copy flags CPY, constant flags CNT, next order instruction codes, next order node numbers, and left/right identification codes L/R. Program storage unit 5 fetches (reads out) the next order instruction code and the next order node number from the data flow program by addressing based on the node number of an input packets P. The instructions stored in program storage unit 5 are classified into three kinds of instructions, "usual instruction", "instruction with, packet copying", and "instruction with constant data". The structure of an output packet from program storage unit 1 is the same as the structure of the data packet P shown in FIG. 33.
When program storage unit 5 fetches the "usual instruction" by addressing based on a node number stored in the input packet, the fetched instruction code, node number, and flag L/R are stored in the fields f2, f4, and f5 of the input packet, respectively and outputs the input packet.
When program storage unit 5 fetches "instruction with packet copying" by addressing based on a node stored in an input packet, the same processing as the above "usual instruction" is performed, and then the content of a corresponding region in the next address is sequentially fetched, in response to the copying flag CPY stored in the addressing region being "1". As in the case of the "usual instruction", the fetched next order instruction code, next order node number, and identification code L/R are stored in the fields f2, f4 and f5 of the input packet and the packet is output. Thus, if the "instruction with packet copying" is fetched in program storage unit 5, generally, two packets storing different instruction codes, node numbers and left/right identification codes L/R are output from program storage unit 5.
When program storage unit 5 fetches the "instruction with constant data" by addressing based on a node number stored in an input packet, the same processing as the above "usual instruction" is performed, and then the content of a region corresponding to the next address is sequentially fetched in response to the constant flag CNT stored in the addressing region being 1. The fetched content is constant data. After the fetched constant data are written in the fields f6 or f7 of the input packet, the code L/R of the input packet is inverted, and the packet is output. Thus, in program storage unit 5, when the "instruction with constant data" is fetched, generally, two data packets storing different data and identification codes L/R are output from program storage unit 5 for one input packet.
In FIG. 32, firing control unit 6 queues for a data packet output from program storage unit 5, in other words detects two different data packets having the same generation number and node number, and produces a data pair. Part of the storage content of the essential element of firing control unit 6, a queuing memory (not shown in FIG. 32) is shown in FIG. 35. In FIG. 35, the queuing memory is addressed based on the node number and the address portion of the generation number stored in the input packet from program storage unit 5. The non-address portion of the generation number, the queuing data, and the firing control flag VLD are stored in regions which can be addressed.
When an instruction code stored in an input packet represents a one-input instruction requiring only one operand, firing control unit 6 outputs the input packet without performing any processing. Meanwhile, if the instruction code of the input packet is a 2-input instruction requiring two operands, the queuing memory is accessed by addressing based on the node number and the address portion of the generation number of the input packet. If the flag VLD stored in the addressing region of the input packet indicates 0, data stored in the field f6 or f7 of the input packet is written in the addressing region as queuing data, and the non-address portion of the generation number of the input packet is written in a similar manner. Then, the flag VLD of the addressing region is set to "1". In this case, firing control unit 6 does not output a packet.
When the flag VLD stored in the addressing region of the queuing memory indicates "1", it is detected whether or not the non-address portion of the generation number of the input packet is in agreement with the non-address portion of the generation number written in the addressing region. If a coincidence is detected, a data pair is produced from data stored in the field f6 or f7 of the input packet and data read out from the addressing region, and a data packet storing the produced data pair is output. At the time, the data to be stored in the fields f6 and f7 of the output packet is decided as follows. When the identification code L/R of the input packet is "L", data in the input packet is set to the left operand data of the output packet and queuing data read out from the queuing memory to the right operand data of the output packet. Meanwhile, if identification code L/R is a code "R", the set content of the left/right operand data of the output packet is reversed from the above case in which the code L/R of the input packet is "L". The instruction code, generation number and node number of the input packet are directly set in the fields f2, f3, and f4 of the output packet. At that time, the flag VLD stored in the addressing region of the queuing memory is set to "0".
When the flag VLD stored in the addressing region of the queuing memory is "1", and the non-address portion of the generation number stored in the input packet does not coincide with the non-address portion of the generation number of the addressing region, the through flag SF of the input packet is set to "1" and the input packet is output as it is.
The through flag SF in the data packet P is usually set to "0", but if the non-address portion of the generation number of the input packet does not coincide with that of the queuing data in firing control unit 6 as described above, the flag can be set to "1". If a data packet with its flag SF being set to "1" is input, all the function portions except firing control unit 6 in information processor 30 shown in FIG. 32 send the input packet without performing any processing. Accordingly, when the through flag SF stored in the data packet is set to "1" and then reset to "0", a data pair is produced in firing control unit 6, and the data packet is output from firing control unit 6 in a packet structure storing the left/right operand data as shown in FIG. 33, in other words, a firing takes place.
In FIG. 32, the data packet output from firing control unit 6 is applied to operation unit 2. Operation unit 2 inputs the data packet, decodes the instruction code of the input packet, performs a prescribed operation processing to the left operand data or right operand data stored in the input data packet based on the result of decoding, writes the operation result in the field f6 of the input data packet and outputs the input data packet. The data packet output from operation unit 2, is applied to branch portion 3. Branch portion 3 selectively outputs the input data packet to one of the outside of information processor 30 and junction portion 4 based on the node number of the input data packet. Junction portion 4 inputs the data packet applied from the outside of the information processor 30 or branch portion 3 and outputs the input data packet to program storage unit 5 in the order of input.
Thus, the circulation of the data packet shown in FIG. 33 from program storage unit 5.fwdarw.firing control unit 6.fwdarw.operation unit 2.fwdarw.branch portion 3.fwdarw.junction portion 4.fwdarw.program storage unit 5.fwdarw. . . . permits an operation processing based on the data flow program stored in program storage unit 5.
In the method of controlling program execution utilizing the conventional storage unit 5 as described above is encountered with a disadvantage that the mechanism forming the hardware circuits of program storage unit 5 is complicated, because the number of fetching program data differs depending upon whether or not a copying processing operation by the copying flag CPY, or a constant data processing operation by the constant flag CNT is present. This disadvantage will be described in conjunction with FIG. 36.
Program storage unit 5 shown in FIG. 36 includes transfer control portions 51 and 52, input and output registers 53 and 54, a memory control portion 55, a memory 56 for storing a data flow program, and a flag detection portion 57 for detecting the states of a copying flag CPY and a constant flag CNT read out from memory 56. Transfer control portion 51 upon receiving a transfer pulse indicating that a data packet is output from junction portion 4, applies a control pulse to store the data from junction portion 4 and output the same at a time and applies a transfer pulse to transfer control portion 52. Control portion 52, upon receiving the input transfer pulse, applies a control pulse to control output register 54 to store and output the data applied from input register 53 and memory 56. Accordingly, when the data packet output from junction portion 4 is stored in the input register 53 of program storage unit 5, the data stored in register 53, immediately before that, is output to the circuits from the next stage forward, and the data stored in output register 54 is output to a pair data detection portion 6 in a data packet.
The data packet output from junction portion 4 is input in input register 53, once stored therein, and then applied to output register 54 to be stored therein. Memory control portion 55 operates to read out the next order program data from memory 56 by addressing based on the node number of the input packet. The flags CPY and CNT of the read out program data are applied to detection portion 57, and the remaining data is applied to output register 54. The instruction code, node number, and identification code L/R of the data of the input packet stored in output register 54 are updated utilizing the next program data read out from memory 56. If the result of flag detection of flag detection portion 57 indicates that it is not necessary to perform another fetching operation to memory 56, the data packet stored in output register 54 is directly output to firing control unit 6. If the result of flag detection of flag detection portion 57 indicates that it is necessary to perform another fetching operation to memory 56, the first data packet from output register 54 is output to firing control unit 6, transfer control portion 51 is instructed to produce another data packet, and a feedback control to instruct memory control portion 55 to produce another memory access cycle to memory 56 is made. At that time, transfer control portion 51 once again makes a control to transfer the data packet output from junction portion 4 and stored in input register 53 to output register 54. In parallel to this, memory control portion 55 reads out data from the next addressing region following the addressing region immediately before, and therefore the read out data is applied to output register 54 in which the second data packet is produced. The produced second data packet is output to firing control unit 6 following the first data packet under the control of transfer control portion 52. At that time, in order to achieve such a structure that data packets are output without interruption from a view of the output side of program storage unit 5, the mechanism of transfer control portions 51 and 52, and memory control portion 55 become very sophisticated.
Furthermore, due to the above-described copying processing operation or, constant data processing operation, the number of steps in the data flow program stored in the program memory of program storage unit 5 is reduced to the half the number of the maximum program steps which can be stored in the memory in the worst case. Thus, the number of program steps which can be stored changes depending upon the content of a program. Therefore, a determination whether or not all the program data can be stored in the program memory must be made in advance and finally the program data must be appropriately divided depending upon the result of determination. This is undesirable in practical applications.
It is assumed that the number of maximum program steps which can be stored in the program memory of program storage unit 5 is 256, for example. EQU Y=ai * X (where ai: constant data, Y: resultant data, X: input variable data) (1)
There is present a method of operation by which a plurality of the above-described equations (1) are prepared, a node numbers attached to input variable data X is appropriately changed, and one of the plurality of operation equation (1) is selected to produce a result. In this case, since two steps are necessary, one for an operation instruction * and the other for constant data ai for the number of program steps per one equation (1) only 128 such equations (1) can be stored in the program memory (the worst case).
Meanwhile, there is present one method of operation by which a plurality kinds of operations such as addition and subtraction other than multiplication as given by the following equation (2) are prepared, node numbers attached to data X and Z are appropriately changed, and one of the plurality kinds of operations is selected for operation. EQU Y=X * Z (where Y, X and Z: resultant data) (2)
In this case, since one step is necessary for each equation (2), 256 such equations (2) can be stored in the program memory (the best case).
Accordingly, if a data flow program produced by mixing the above equations (1) and (2) is stored in the program memory, the number of equations (1) and (2) which can be stored in the program memory changes in the range from 128 to 156 depending upon how many equations which have constant data, in other words the above equations (1) are included. Differently stated, if a data flow program in which a plurality of equations including the above equations (1) and (2) are described is stored in the program memory, one has to check whether or not each of the equations described in the program has constant data in order to determine whether or not the program can be stored in the program memory, and therefore the conventional information processor is not very much practical.
Furthermore, although a packet stored with a 2-input instruction code must queue for one operand data to be paired therewith in the queuing memory of firing control unit 6, the processing is sometimes wasted. More specifically, among 2-input instruction codes, in the case of an instruction code whose one operand data is constant data, although a data packet stored with constant data and a data packet stored with operand data to be paired with the constant data are sequentially read out from program storage unit 5 as described above, the operand data is once written in the queuing memory and queues for the constant data input immediately after. Thus, high speed processing is impaired due to such a redundant processing procedure.